This present disclosure relates to integrated circuit devices, and more particularly to integrated circuit devices including output driver circuits.
An output driver receives a low-power input signal from a controller and produces a high-power drive signal to control another circuit or component, e.g., a power metal-oxide-semiconductor field-effect transistor (MOSFET). When a high rate of a drain-source voltage (dv/dt) is supplied at a drain of the power MOSFET, a voltage across a gate-drain parasitic capacitance between the drain and a gate of the power MOSFET may cause a displacement current to flow from the drain to a gate of the power MOSFET. The displacement current may cause the gate-source voltage to exceed the threshold voltage of the power MOSFET and cause a false turn-on of the power MOSFET.
A conventional output driver includes a pull-down resistor coupled between a gate and a source of a power MOSFET to address the false turn-on. The pull-down resistor is typically provided with a low resistance value, e.g., when a threshold voltage of the power MOSFET is low, a value of a gate-drain parasitic capacitance is large, or both. However, the pull-down resistor having a low resistance value has high power consumption due to a leakage current.